1) SoC-level pre-silicon verification including LPDDR4/4x, PCIe GEN4, USD 31, etc.
Specialized in either field will be good.
2)Test planning, implementation and execution.
3) Design and develop verification environment components such as bus functional models/agents/bus interface models, data/transaction and sequencers, bus monitors, checkers/scoreboard, coverage models, and assertion libraries.
1) 6+ years of experience in this area. Experience in SoC-level verification of AI, data center，fabless chip company or multimedia scenario is a plus.
References to a number of years’ experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
2) In-depth knowledge in SoC architecture, including CPUs, GPUs, MMU, communications peripherals, multi-domain clocking, bus & interconnect structures, DRAM utilization, security, and power management.
3) Strong knowledge in testbench including direct/random test cases, monitor/reference/self-checking models, coverage models and automation of regression suites.
4) Drive feature and sub-system verification during the pre/post silicon phase through simulation (C/RTL), simulation acceleration and emulation (FPGA, Palladium or ZeBu)